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[芯片参数] SONY IMX250LLR-C芯片技术参数规格书尺寸

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Device Structure
2 {1 I  T8 _0 W/ r5 L+ ~◆ CMOS image sensor % f7 M5 K) f- x6 P0 c) l: `
◆ Image size    Diagonal 11.1 mm (Type 2/3)  Approx. 5.07 M pixels All-pixel    Diagonal 7.7 mm (Type 1/2.35)  Approx. 2.11 M pixels    1080p-Full HD ) O9 F2 Z  _7 O" `1 ^. f6 s
◆ Total number of pixels 2464 (H) × 2066 (V)    Approx. 5.09 M pixels   / _7 \3 Y1 K2 t9 U
◆ Number of effective pixels 2464 (H) × 2056 (V)    Approx. 5.07 M pixels     
- v% L& l2 B- i2 x' B' C. |* b0 v◆ Number of active pixels 2464 (H) × 2056 (V)    Approx. 5.07 M pixels   ) [  C. N# B' x  i, J+ A# {* v
◆ Number of recommended recording pixels 2448 (H) × 2048 (V)    Approx. 5.01 M pixels    All-pixel 1920 (H) × 1080 (V)    Approx. 2.07 M pixels    1080p-Full HD
* l5 L# N! T7 L9 j; y◆ Unit cell size 3.45 µm (H) × 3.45 µm (V) " N& ~, T, R7 r
◆ Optical black Horizontal (H) direction: Front 0 pixels, rear 0 pixels Vertical (V) direction: Front 10 pixels, rear 0 pixels
7 R; D  q& L+ y◆ Substrate material Silicon
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Features
" E1 S8 Z8 D" L  H' O◆ CMOS active pixel type dots ; x8 ~$ |& d7 [+ l8 i/ k- {1 M
◆ Built-in timing adjustment circuit, H/V driver and serial communication circuit . ]' p! q( {. _& `! Y" Z- d
◆ Global shutter function ! P' a: _( j! J  @+ L/ z
◆ Input frequency 37.125 MHz / 74.25 MHz / 54MHz
; y4 f# D1 t7 r, v0 U% ^7 t◆ Number of recommended recording pixels: 2448 (H) × 2048 (V) approx. 5.01 M pixels
8 x) U& X6 J) cReadout mode 6 {' z! ]" |! c7 D& Y" \! _: f
All-pixel scan mode " n4 S- x4 c. g! ?+ p. r# t
1080p-Full HD readout mode 9 j. O* K% a' X* Z0 R
Vertical / Horizontal 1 / 2 Subsampling mode
" D' H$ g4 ~( [Vertical 2-pixel FD Binning mode ROI mode 1 g, B9 R' M. E6 s0 b
Vertical / Horizontal‐Normal / Inverted readout mode
/ E7 X4 A! |% ~' J" }- ]. s3 p+ q/ Z◆ Readout rate
7 i) }6 o8 G+ B: M, H6 UMaximum frame rate in   9 \0 F! N# }# o5 E7 T" ]3 J+ V
All-pixel scan mode: 8 bit 163.4 frame/s, 10 bit:144.7 frame/s, 12 bit:89.5 frame/s ; E: n4 t# ~. O: Y
◆ Variable-speed shutter function (resolution 1 H units) - T. H6 S/ l9 k8 G5 ?8 d
◆ 8-bit / 10-bit / 12-bit A/D converter ' }2 F1 s2 _! h0 @' B4 |# A& L
◆ CDS / PGA function     0 dB to 24 dB: Analog Gain (0.1 dB step)     24.1 dB to 48 dB: Analog Gain: 24 dB + Digital Gain: 0.1 dB to 24 dB (0.1 dB step) 2 L' |3 y' ^6 a
◆ I/O interface Low voltage LVDS (150 mVp-p) serial (4 ch / 8 ch / 16ch switching) DDR output
$ a, @4 i2 w' i: `- ?◆ Recommended lens F number: 2.8 or more (Close side)
9 J# `6 Q1 m+ P, w, D  Z3 j; f◆ Recommended exit pupil distance: –100 mm to –∞
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